Chapter 14 Enhanced Capture Timer (ECT16B8CV3)
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
559
Read: Anytime.
Write: Has no effect.
All bits reset to zero.
These registers are used to latch the value of the corresponding pulse accumulator when the related bits in
register ICPAR are enabled (see
Section 14.4.1.3, “Pulse Accumulators”
).
14.3.2.31 Modulus Down-Counter Count Register (MCCNT)
Read: Anytime
Write: Anytime.
All bits reset to one.
A full access for the counter register will take place in one clock cycle.
NOTE
A separate read/write for high byte and low byte will give different results
than accessing them as a word.
If the RDMCL bit in MCCTL register is cleared, reads of the MCCNT register will return the present value
of the count register. If the RDMCL bit is set, reads of the MCCNT will return the contents of the load
register.
Module Base + 0x0035
7
6
5
4
3
2
1
0
R
PA0H7
PA0H6
PA0H5
PA0H4
PA0H3
PA0H2
PA0H1
PA0H0
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 14-55. 8-Bit Pulse Accumulators Holding Register 0 (PA0H)
Module Base + 0x0036
15
14
13
12
11
10
9
8
R
MCCNT15
MCCNT14
MCCNT13
MCCNT12
MCCNT11
MCCNT10
MCCNT9
MCCNT8
W
Reset
1
1
1
1
1
1
1
1
Figure 14-56. Modulus Down-Counter Count Register High (MCCNT)
Module Base + 0x0037
7
6
5
4
3
2
1
0
R
MCCNT7
MCCNT6
MCCNT5
MCCNT4
MCCNT3
MCCNT2
MCCNT1
MCCNT0
W
Reset
1
1
1
1
1
1
1
1
Figure 14-57. Modulus Down-Counter Count Register Low (MCCNT)
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
