Chapter 3 Memory Mapping Control (S12XMMCV4)
MC9S12XE-Family Reference Manual Rev. 1.19
Freescale Semiconductor
201
3.3.2.6
Program Page Index Register (PPAGE)
Read: Anytime
Write: Anytime
These eight index bits are used to page 16 KByte blocks into the Flash page window located in the local
(CPU or BDM) memory map from address 0x8000 to address 0xBFFF (see
accessing up to 4 Mbytes of Flash (in the Global map) within the 64 KByte Local map. The PPAGE register
is effectively used to construct paged Flash addresses in the Local map format. The CPU has special access
to read and write this register directly during execution of CALL and RTC instructions..
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Figure 3-12. PPAGE Address Mapping
NOTE
Writes to this register using the special access of the CALL and RTC
instructions will be complete before the end of the instruction execution.
Address: 0x0015
7
6
5
4
3
2
1
0
R
PIX7
PIX6
PIX5
PIX4
PIX3
PIX2
PIX1
PIX0
W
Reset
1
1
1
1
1
1
1
0
Figure 3-11. Program Page Index Register (PPAGE)
Table 3-13. PPAGE Field Descriptions
Field
Description
7–0
PIX[7:0]
Program Page Index Bits 7–0
— These page index bits are used to select which of the 256 FLASH or ROM
array pages is to be accessed in the Program Page Window.
Bit14
Bit0
1
Address [13:0]
PPAGE Register [7:0]
Global Address [22:0]
Bit13
Bit21
Address: CPU Local Address
or BDM Local Address
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
S12XE
products
in
208
MAPBGA
packages
