Overview
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
1-14
Freescale Semiconductor
1.4.20
Reset
The reset controller determines the source of reset, asserts the appropriate reset signals to the system, and
keeps track of what caused the last reset. There are seven sources of reset:
•
External reset input
•
Power-on reset (POR)
•
Watchdog timer
•
Phase locked-loop (PLL) loss of lock
•
PLL loss of clock
•
Software
•
Low-voltage detector (LVD)
Control of the LVD and its associated reset and interrupt are managed by the reset controller. Other
registers provide status flags indicating the last source of reset and a control bit for software assertion of
the RSTO pin.
1.4.21
GPIO
Nearly all pins on the MCF52235 have general purpose I/O capability in addition to their primary
functions and are grouped into 8-bit ports. Some ports do not utilize all 8 bits. Each port has registers that
configure, monitor, and control the port pins.
1.4.22
1.5
Memory Map Overview
Table 1-3. System Memory Map
Base Address (Hex)
Size
Use
0x0000_0000 1G
On-Chip
Flash/RAM
Array2
0x4000_0000
64 bytes
System Control Module
0x4000_0040 64
bytes
Reserved
0x4000_0080 128
bytes
Reserved
0x4000_0100
16 bytes
DMA (Channel 0)
0x4000_0110
16 bytes
DMA (Channel 1)
0x4000_0120
16 bytes
DMA (Channel 2)
0x4000_0130
16 bytes
DMA (Channel 3)
0x4000_0140 196
bytes
Reserved
0x4000_0200 64
bytes
UART0
0x4000_0240 64
bytes
UART1
0x4000_0280 64
bytes
UART2
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
