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CHAPTER 8 16-BIT TIMER/EVENT COUNTER
User’s Manual U12697EJ3V0UM
(2) Capture/compare control register 0 (CRC0)
This register controls the operation of capture/compare registers (CR00 and CR01).
CRC0 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets CRC0 to 00H.
Figure 8-3. Format of Capture/Compare Control Register 0 (CRC0)
Address: FF16H After reset: 04H R/W
Symbol
7
6
5
4
3
2
1
0
CRC0
0
0
0
0
0
CRC02
CRC01
CRC00
CRC02
Selection of operation mode of CR01
0
Operates as compare register.
1
Operates as capture register.
CRC01
Selection of capture trigger of CR00
0
Captured at valid edge of TI01.
1
Captured in reverse phase of valid edge of TI00.
CRC00
Selection of operation mode of CR00
0
Operates as compare register.
1
Operates as capture register.
Cautions 1. Before setting CRC0, be sure to stop the timer operation.
2. When the mode in which the timer is cleared and started on match between 16-bit timer
counter 0 (TM0) and CR00 is selected by 16-bit timer mode control register 0 (TMC0),
do not specify CR00 as a capture register.
(3) 16-bit timer output control register 0 (TOC0)
This register controls the operation of the 16-bit timer/event counter output controller by setting or resetting via
timer-output level software, enabling or disabling reverse output, enabling or disabling output of the 16-bit timer/
event counter, enabling or disabling the one-shot pulse output operation, and selecting an output trigger for a
one-shot pulse by software.
TOC0 is set by a 1-bit or 8-bit memory manipulation instruction.
RESET input sets TOC0 to 00H.
Figure 8-4 shows the format of TOC0.
