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CHAPTER 10 8-BIT TIMERS 5, 6
User’s Manual U12697EJ3V0UM
10.5 Cautions
(1) Error when the timer starts
The time until the coincidence signal is generated after the timer starts has a maximum error of one clock. The
reason is the starting of 8-bit timer counters 5 and 6 (TM5, TM6) is asynchronous with respect to the count pulse.
Figure 10-9. Start Timing of 8-Bit Timer Counter
TM5, TM6 count value
00H
01H
02H
04H
Count pulse
Timer starts
03H
(2) Operation after the compare register is changed while the timer is counting
If the value after 8-bit compare registers 50 and 60 (CR50, CR60) changes is less than the value of 8-bit timer
counters 5 and 6 (TM5, TM6), counting continues, overflows, and counting starts again from 0. Consequently,
when the value (M) after CR50, CR60 changes is less than the value (N) before the change, the timer must restart
after CR50, CR60 changes.
Figure 10-10. Timing After the Compare Register Changes During Timer Counting
CR50, CR60
N
M
Count pulse
TM5, TM6 count value
X – 1
X
FFFFH
0000H
0001H
0002H
Caution Except when the TI5, TI6 input is selected, always set TCE5 = 0, TCE6 = 0 before setting the
STOP mode.
Remark
N > X > M
(3) TM5, TM6 read out during timer operation
Since reading out TM5, TM6 during operation occurs while the selected clock is temporarily stopped, select some
high or low level waveform that is longer than the selected clock.
When reading TM5 and TM6 during cascade connection mode, to avoid reading while the count is changing, take
measures such as obtaining a count match by reading twice using software.
