CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
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Each data frame is composed for the bits outlined below.
• Start bit .........................
1 bit
• Character bits ..............
7 bits/8 bits
• Parity bit .......................
Even parity/Odd parity/0 parity/No parity
• Stop bit(s) ....................
1 bit/2 bits
Specification of the character bit length inside data frames, selection of the parity, and selection of the stop
bit length, are performed with asynchronous serial interface mode register n (ASIMn).
f 7 bits has been selected as the number of character bits, only the lower 7 bits (bits 0 to 6) are valid. In the
case of transmission, the most significant bit (bit 7) is ignored. In the case of reception, the most significant
bit (bit 7) always becomes “0”.
The setting of the serial transfer rate is performed with the ASIMn and baud rate generator control register
n (BRGCn).
If a serial data reception error occurs, it is possible to determine the contents of the reception error by reading
the status of asynchronous serial interface status register n (ASISn).
Remark
n = 1, 2
D0
D1
D2
D3
D4
D5
D6
D7
Parity
bit
Stop bit(s)
Start
bit
1-data frame
Character bits
(2) Communication operation
(a) Data format
The format for sending and receiving data is shown in Figure 16-7.
Figure 16-7. Format of Asynchronous Serial Interface Transmit/Receive Data