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CHAPTER 22 INTERRUPT FUNCTIONS
User’s Manual U12697EJ3V0UM
22.7.3 Maskable interrupt priority levels
The
µ
PD784225 performs multiple interrupt servicing in which an interrupt is acknowledged during servicing of
another interrupt. Multiple interrupts can be controlled by priority levels.
There are two kinds of priority control, control by default priority and programmable priority control in accordance
with the setting of the priority specification flag. In priority control by means of default priority, interrupt service is
performed in accordance with the priority preassigned to each interrupt request (default priority) (refer to
Table 22-
2
). In programmable priority control, interrupt requests are divided into four levels according to the setting of the priority
specification flag. Interrupt requests for which multiple interruption is permitted are shown in Table 22-5.
Since the IE flag is cleared (0) automatically when an interrupt is acknowledged, when multiple interruption is used,
the IE flag should be set (1) to enable interrupts by executing an IE instruction in the interrupt service program, etc.
Table 22-5. Multiple Interrupt Servicing
Priority of Interrupt Currently
ISPR Value
IE Flag in PSW
PRSL in
Acknowledgeable Maskable Interrupts
Being Acknowledged
IMC Register
No interrupt being
00000000
0
×
• All macro service only
acknowledged
1
×
• All maskable interrupts
3
00001000
0
×
• All macro service only
1
0
• All maskable interrupts
1
1
• All macro service
• Maskable interrupts specified as
priority 0/1/2
2
0000
×
100
0
×
• All macro service only
1
×
• All macro service
• Maskable interrupts specified as
priority 0/1
1
0000
××
10
0
×
• All macro service only
1
×
• All macro service
• Maskable interrupts specified as
priority 0
0
0000
×××
1
×
×
• All macro service only
Non-maskable interrupts
1000
××××
×
×
• All macro service only
0100
××××
1100
××××
