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CHAPTER 22 INTERRUPT FUNCTIONS
User’s Manual U12697EJ3V0UM
22.3.2 Interrupt mask registers (MK0, MK1)
The MK0 and MK1 are composed of interrupt mask flags. MK0 and MK1 are 16-bit registers which can be
manipulated as a 16-bit unit. MK0 can be manipulated in 8-bit units using MK0L and MK0H, and similarly MK1 can
be manipulated using MK1L and MK1H.
In addition, each bit of the MK0 and MK1 can be manipulated individually with a bit manipulation instruction in 1-
bit units. Each interrupt mask flag controls enabling/disabling of the corresponding interrupt request.
When an interrupt mask flag is set (1), acknowledgment of the corresponding interrupt request is disabled.
When an interrupt mask flag is cleared (0), the corresponding interrupt request can be acknowledged as a vectored
interrupt or macro service request.
Each interrupt mask flag in the MK0 and MK1 is the same flag as the interrupt mask flag in the interrupt control
register. The MK0 and MK1 are provided for en bloc control of interrupt masking.
After RESET input, the MK0 and MK1 are set to FFFFH, and all maskable interrupts are disabled.
