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CHAPTER 10 8-BIT TIMERS 5, 6
User’s Manual U12697EJ3V0UM
10.4 Operation
10.4.1 Operation as interval timer (8-bit operation)
The timer operates as an interval timer that repeatedly generates interrupt requests at the interval of the preset
count in 8-bit compare registers 50 and 60 (CR50, CR60).
If the count in 8-bit timer counters 5 and 6 (TM5, TM6) matches the value set in CR50, CR60, simultaneous to
clearing the value of TM5, TM6 to 0 and continuing the count, the interrupt request signal (INTTM5, INTTM6) is
generated.
TM5 and TM6 count clocks can be selected with bit 0 to 2 (TCLn0 to TCLn2) in prescaler mode registers 5 and
6 (PRM5, PRM6).
<Setting method>
<1> Set each register.
• PRMn: Selects the count clock.
• CRn0: Compare value
• TMCn: Selects the clear and start mode when TMn and CRn0 match.
(TMCn = 0000
×××
0B,
×
= don’t care)
<2> When TCEn = 1 is set, counting starts.
<3> When the values of TMn and CRn0 match, INTTMn is generated (TMn is cleared to 00H).
<4> Then, INTTMn is repeatedly generated during the same interval. When counting stops, set TCEn = 0.
Remark
n = 5, 6
