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CHAPTER 22 INTERRUPT FUNCTIONS
User’s Manual U12697EJ3V0UM
22.3.4 Interrupt mode control register (IMC)
IMC contains the PRSL flag. The PRSL flag specifies enabling/disabling of nesting of maskable interrupts for which
the lowest priority level (level 3) is specified.
When the IMC is manipulated, the interrupt disabled state (DI state) should be set first to prevent misoperation.
IMC can be read or written to with an 8-bit manipulation instruction or bit manipulation instruction.
RESET input sets the IMC register to 80H.
Figure 22-4. Format of Interrupt Mode Control Register (IMC)
IMC
PRSL
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
PRSL
0
1
Address: 0FFAAH
R/W
After reset: 80H
Symbol
Nesting control of maskable interrupt (lowest level)
Interrupts with level 3 (lowest level) can be nested.
Nesting of interrupts with level 3 (lowest level) is disabled.
