CHAPTER 16 ASYNCHRONOUS SERIAL INTERFACE/3-WIRE SERIAL I/O
User’s Manual U12697EJ3V0UM
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(d) Reception
When the RXEn bit of asynchronous serial interface mode register n (ASIMn) is set to 1, reception is enabled
and sampling of the RxDn pin input is performed.
Sampling of the RxDn pin input is performed by the serial clock set in baud rate generator control register
n (BRGCn).
The 5-bit counter for the baud rate generator will begin counting when the RxDn pin input reaches low level,
and the ‘start timing’ signal for data sampling will be output when half of the time set for the baud rate has
passed. If the result of re-sampling the RxDn pin input with this start timing signal is low level, the RxDn pin
input is perceived as the start bit, the 5-bit counter is initialized and begins counting, and data sampling is
performed. When, following the start bit, character data, the parity bit, and one stop bit are detected, reception
of one frame of data is completed.
When reception of one frame of data is completed, the receive data in the shift register is transferred to receive
shift register n (RXBn), and a receive completion interrupt (INTSRn) is generated.
Also, even if an error occurs, the receiving data for which the error occurred is transferred to RXBn. If an
error occurs, when bit 1 (ISRMn) of ASIMn is cleared (0), INTSRn is generated. (refer to
Figure 16-10
).
When bit ISRMn is set (1), INTSRn is not generated.
When bit RXEn is reset to 0 during a receive operation, the receive operation is immediately stopped. At
this time, the contents of RXBn and ASISn remain unchanged, and INTSRn and INTSERn are not generated.
Remark
n = 1, 2
Figure 16-9. Asynchronous Serial Interface Receive Completion Interrupt Request Timing
D1
D2
D6
D7
Parity
D0
RxDn (input)
INTSRn
STOP
START
Caution
Even when a receive error occurs, be sure to read receive buffer register n (RXBn).
If RXBn is not read, an overrun error will occur during reception of the next data, and
the reception error status will continue indefinitely.
Remark
n = 1, 2
