Deserial Serial Peripheral Interface (DSPI)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
23-9
Preliminary
23.3.2.3
DSPI Clock and Transfer Attributes Registers 0–7 (DSPI_CTARn)
The DSPI modules each contain eight clock and transfer attribute registers (DSPI_CTAR
n
) which are used
to define different transfer attribute configurations. Each DSPI_CTAR controls:
•
Frame size
•
Baud rate and transfer delay values
•
Clock phase
•
Clock polarity
•
MSB/LSB first
At the initiation of an SPI or DSI transfer, control logic selects the DSPI_CTAR that contains the transfer’s
attributes.
NOTE
The user must not write to the DSPI_CTARs while the DSPI is running.
In master mode, the DSPI_CTAR
n
registers define combinations of transfer attributes such as frame size,
clock phase and polarity, data bit ordering, baud rate, and various delays. In slave mode, a subset of the bit
fields in the DSPI_CTAR0 and DSPI_CTAR1 registers are used to set the slave transfer attributes. See the
individual bit descriptions for details on which bits are used in slave modes.
When the DSPI is configured as an SPI master, the CTAS field in the command portion of the TX FIFO
entry selects which of the DSPI_CTAR registers is used on a per-frame basis. When the DSPI is configured
as an SPI bus slave, the DSPI_CTAR0 register is used.
When the DSPI is configured as a DSI master, the DSICTAS field in the DSPI DSI configuration register
(DSPI_DSICR) selects which of the DSPI_CTAR register is used. For more information on the
DSPI_DSICR see
Section 23.3.2.10, “DSPI DSI Configuration Register (DSPI_DSICR)
is configured as a DSI bus slave, the DSPI_CTAR1 register is used.
In CSI configuration, the transfer attributes are selected based on whether the current frame is SPI data or
DSI data. SPI transfers in CSI configuration follow the protocol described for SPI configuration, and DSI
transfers in CSI configuration follow the protocol described for DSI configuration. CSI configuration is
only valid with master mode. See
Section 23.4.5, “Combined Serial Interface (CSI) Configuration
more details.
Table 23-3. DSPI_TCR Field Descriptions
Field
Description
SPI_TCNT SPI Transfer Counter. Counts the number of SPI transfers the DSPI makes. The SPI_TCNT field is incremented
every time the last bit of an SPI frame is transmitted. A value written to SPI_TCNT presets the counter to that value.
SPI_TCNT is reset to zero at the beginning of the frame when the CTCNT field is set in the executing SPI
command. The transfer counter wraps around, incrementing the counter past 65535 resets the counter to zero.
bits 16–31 Reserved.
