Deserial Serial Peripheral Interface (DSPI)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
23-45
Preliminary
23.4.7.1
Baud Rate Generator
The baud rate is the frequency of the serial communication clock (SCK
x
). The system clock is divided by
a baud rate prescaler (defined by DSPI
x
_CTAR[PBR]) and baud rate scaler (defined by
DSPI
x
_CTAR[BR]) to produce SCK
x
with the possibility of doubling the baud rate. The DBR, PBR, and
BR fields in the DSPI
x
_CTARs select the frequency of SCK
x
using the following formula:
shows an example of a computed baud rate.
23.4.7.2
PCS to SCK Delay (t
CSC
)
The PCS
x
to SCK
x
delay is the length of time from assertion of the PCS
x
signal to the first SCK
x
edge.
for an illustration of the PCS
x
to SCK
x
delay. The PCSSCK and CSSCK fields in the
DSPI
x
_CTAR
n
registers select the PCS
x
to SCK
x
delay, and the relationship is expressed by the following
formula:
shows an example of the computed PCS to SCK delay.
23.4.7.3
After SCK Delay (t
ASC
)
The after SCK
x
delay is the length of time between the last edge of SCK
x
and the negation of PCS
x
. See
for illustrations of the after SCK
x
delay. The PASC and ASC fields in the
DSPI
x
_CTAR
n
registers select the after SCK delay. The relationship between these variables is given in
the following formula:
shows an example of the computed after SCK delay.
Table 23-22. Baud Rate Computation Example
f
SYS
PBR
Prescaler
Value
BR
Scaler
Value
DBR
Value
Baud Rate
66 MHz
0b00
2
0b0000
2
0
16.67 Mb/s
20 MHz
0b00
2
0b0000
2
1
10 Mb/s
Table 23-23. PCS to SCK Delay Computation Example
PCSSCK
Prescaler
Value
CSSCK
Scaler
Value
f
SYS
PCS to SCK Delay
0b01
3
0b0100
32
66 MHz
1.44
μ
s
SCK baud rate
f
SYS
PBRPrescalerValue
----------------------------------------------------------
1
DBR
+
BRScalerValue
--------------------------------------------
×
=
t
CSC
=
f
SYS
CSSCK
×
PCSSCK
1
×
t
ASC
=
f
SYS
ASC
×
PASC
1
×
