Flash Array and Control
MPC5510 Microcontroller Family Reference Manual, Rev. 1
Freescale Semiconductor
22-13
Preliminary
22.4.2.5
Low-/Mid-Address Space Block Select Register (LMS)
The LMS provides a means to select blocks to be operated on during erase.
SMLOCK[1:0] Secondary Mid-Address Block Lock. Alternative method that may be used to lock the mid-address space
blocks from programs and erases. SMLOCK has the same description as MLOCK in section
Section 22.4.2.2, “Low-/Mid-Address Space Block Locking Register
.” SMLOCK is not writable unless
SLE is set.
If blocks are not present (due to configuration or total memory size), the SMLOCK bits will default to
locked and will not be writable.
bits 16–21
Reserved.
SLLOCK[9:0]
Secondary Low-Address Block Lock. These bits are an alternative method that may be used to lock the
low-address space blocks from programs and erases. SLLOCK has the same description as LLOCK in
Section 22.4.2.2, “Low-/Mid-Address Space Block Locking Register
. SLLOCK is not writable unless SLE
is high.
If blocks are not present (due to configuration or total memory size), the SLLOCK bits will default to
locked, and will not be writable.
Offset: FLASH_REG 0x0010
Access: User read/write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MSEL
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
LSEL
W
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Figure 22-8. Low-/Mid-Address Space Block Select Register (LMS)
Table 22-8. LMS Field Descriptions
Field
Description
bits 0–13
Reserved.
MSEL
Mid-Address Space Block Select. Values in the selected register signify that a block is or is not selected for
erase. The reset value for the select registers is 0, or unselected. The blocks must be selected (or
unselected) before doing an erase interlock write as part of the erase sequence. The select register is not
writable once an interlock write is completed or if a high-voltage operation is suspended. In the event that
blocks are not present (due to configuration or total memory size), the corresponding SELECT bits will
default to unselected, and will not be writable. The reset value will always be 0 and register writes will have
no effect. A description of how blocks are numbered is detailed in
Section 22.4.2.2, “Low-/Mid-Address
.”
0b00 Mid-address space blocks are not selected for erase
0b01 One mid-address space block is selected for erase
0b11 Two mid-address space blocks are selected for erase
Table 22-7. SLL Field Descriptions (continued)
Field
Description
