Enhanced Queued Analog-to-Digital Converter (eQADC)
MPC5510 Microcontroller Family Reference Manual, Rev. 1
31-26
Freescale Semiconductor
Preliminary
Their assigned addresses are the values used to set the ADC_REG_ADDRESS field of the read/write
configuration commands bound for the on-chip ADC. These are halfword addresses. Further, the
following restrictions apply when accessing these registers:
•
Registers ADC0_CR, ADC0_GCCR, and ADC0_OCCR can be accessed by configuration
commands sent to the ADC0 command buffer only.
•
Registers ADC_TSCR and ADC_TBCR can be accessed by configuration commands sent to the
ADC0 command buffer.
31.3.4.1
ADC0 Control Register (ADC0_CR)
The ADC0 control register (ADC0_CR) is used to configure the on-chip ADC.
Table 31-18. ADC0 Registers
ADC0
Register
Address
Register
Access
Reset Value
Section/Page
0x0000
ADC0 Address 0x00 is used for conversion command messages.
0x0001
ADC0_CR — ADC0 Control Register
R/W
0x0002
ADC_TSCR — ADC Time Stamp Control Register
R/W
0x0003
ADC_TBCR — ADC Time Base Counter Register
R/W
0x0004
ADC0_GCCR — ADC0 Gain Calibration Constant Register
R/W
0x0005
ADC0_OCCR — ADC0 Offset Calibration Constant Register
R/W
0x0006–
0x00FF
Reserved
Offset: 0x0001
Access: Read/Write
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R ADC0
_EN
0
0
0
ADC0
_
EMUX
0
0
0
0
0
0
ADC0_CLK_PS
W
Reset
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
R
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
W
Reset
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
Figure 31-15. ADC0 Control Registers (ADC0_CR)
