X20 system modules • Digital signal processing modules • X20DS1828
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X20 system User's Manual 3.10
4.16.4.10.10.4 Registers for FlatStream mode
Five registers are available for configuring FlatStream. The default configuration can be used to transmit small
amounts of data relatively easily.
Information:
The CPU communicates directly with the field device via the "OutputSequence" and "InputSequence"
as well as the enabled Tx and Rx bytes. For this reason, the user needs to have sufficient knowledge
of the communication protocol being used on the field device.
FlatStream configuration
To use FlatStream, the program sequence must first be expanded. The cycle time of the FlatStream routines must
be set to a multiple of the bus cycle. Other program routines should be implemented in Cyclic #1 to ensure data
consistency.
At the absolute minimum, the "InputMTU" and "OutputMTU" registers need to be configured. All other registers are
filled in with default values at the beginning and can be used immediately. These registers are used for additional
options, e.g. to transmit data in a more compact way or to increase the efficiency of the general procedure.
The Forward registers extend the functionality of the FlatStream protocol. This functionality is useful for substan-
tially increasing the FlatStream data rate, but it also requires quite a bit of extra work when creating the program
sequence.
Number of enabled Tx and Rx bytes
Name:
OutputMTU
InputMTU
These registers define the number of enabled Tx or Rx bytes, i.e. the maximum size of a sequence. The user must
consider that the more bytes made available also means a higher load on the bus system.
Information:
In the rest of this documentation, the names "OutputMTU" and "InputMTU" do not refer to the registers
explained here. Instead, they are used as synonyms for the currently enabled Tx or Rx bytes.
Data type
Value
USINT
See the module-specific register overview (theoretically: 3 to 27)
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