X20 system modules • Analog output modules • X20AO2438
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X20 system User's Manual 3.10
HartMode
Name:
HartMode_1 to HartMode_2
The user can use these registers to configure the communication behavior of each of the HART channels. Gener-
ally, the HART nodes are polled individually. This register can still be used to start or stop burst mode when needed.
In burst mode, a node transmits its information cyclically instead of continuously. As a result, the HART standard
allows the simultaneous usage of both burst mode and polling.
Information:
To retrieve information with burst mode, the "HartBurstNode"HartBurstNode register must be config-
ured correctly.
Data type
Value
UINT
See bit structure.
Bit structure:
Bit
Name
Value
Information
0
Polling mode enabled (Bus Controller Default)
0
Slave polling mode
1
Polling mode disabled
0
No response to burst (bus controller default)
1
Start slave burst mode
1
Enables burst mode in the "HartBurstNode" nodeHartBurstNode
0
No response to burst (bus controller default)
2
Stop slave burst mode
1
Disables burst mode, if enabled
3 - 7
Reserved
-
4.4.3.10.6.2 HART - Communication
Once the configuration has been completed, the information is retrieved automatically and transferred to the
module's registers. A separate register in the module is implemented for each piece of information. HART modules
are designed to retrieve up to 15 pieces of information per channel. The module reads in the data, stores it in tem-
porary memory and prepares it for retrieval. When the X2X master accesses the module registers, it is irrelevant
whether the HART data originates from a point-to-point network or a multidrop network.
Overview of internal module mapping
Point-to-point network (1 HART slave)
Multidrop network (2 to 15 HART slaves)
(Pv)Input_01
Primary piece of information from HART node 1
Primary piece of information from HART node 1
(Pv)Input_02
Secondary piece of information from HART node 1
Primary piece of information from HART node 2
...
...
...
(Pv)Input_04
Quaternary piece of information from HART node 1
Primary piece of information from HART node 4
(Pv)Input_05
Reserved
Primary piece of information from HART node 5
...
...
...
(Pv)Input_15
Reserved
Primary piece of information from HART node 15
The HART specifications stipulates that information from a HART node be split into various pieces. The value of
a process variable is stored to the respective "PvInput" register and has a size of 4 bytes (REAL) in accordance
with the HART specification. Due to the length limitation of 30 bytes on the X2X link, there are restrictions to
the number of possible cyclic variables. It is recommended to only transfer a maximum of two "PvInput""PvInput"
registers cyclically to the X2X master. All other information should be transferred in a different way. To access
HART information, the user can choose from among the following methods:
•
Data points that are configured to be transferred cyclically are read once per bus cycle. This method allows
information to be exchanged between the module and the X2X master in real time. Nevertheless, the length
limitation may prevent all data from being retrieved within one cycle.
•
If the AsIOAcc library is used, information is retrieved acyclically only when it is needed, i.e. communication
can be adapted to the application running on the X2X master. In this way, all of the necessary module
registers on the X2X link can be polled despite the length limitation.
This method of information exchange is not real-time capable.
•
HART modules are equipped with a FlatStream interface. When using FlatStream communication, the
module acts a bridge between the X2X master and the HART slave, i.e. the X2X master communicates
directly with the HART slave (see section "FlatStream communication""FlatStream communication").
FlatStream communication is also not real-time capable. It allows unrestricted access to the HART slave.
The user must have sufficient knowledge of the HART protocol command set as well as the capabilities
of the HART slave device.
Summary of Contents for X20 System
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