ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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PDMA Fix Priority Clear Register (PDMA_PRICLR)
Register
Offset
R/W Description
Reset Value
PDMA_PRICLR
P 0x414 W
PDMA Fixed Priority Clear Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
FPRICLR15
FPRICLR14
FPRICLR13
FPRICLR12
FPRICLR11
FPRICLR10
FPRICLR9
FPRICLR8
7
6
5
4
3
2
1
0
FPRICLR7
FPRICLR6
FPRICLR5
FPRICLR4
FPRICLR3
FPRICLR2
FPRICLR1
FPRICLR0
Bits
Description
[31:16]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[15]
FPRICLR15
PDMA Channel 15 Fixed Priority Clear Register (Write Only)
Set this bit to 1 to clear fixed priority level.
0 = No effect.
1 = Clear PDMA channel 15 fixed priority setting.
Note:
User can read PDMA_PRISET register to know the channel priority.
[14]
FPRICLR14
PDMA Channel 14 Fixed Priority Clear Register (Write Only)
Set this bit to 1 to clear fixed priority level.
0 = No effect.
1 = Clear PDMA channel 14 fixed priority setting.
Note:
User can read PDMA_PRISET register to know the channel priority.
[13]
FPRICLR13
PDMA Channel 13 Fixed Priority Clear Register (Write Only)
Set this bit to 1 to clear fixed priority level.
0 = No effect.
1 = Clear PDMA channel 13 fixed priority setting.
Note:
User can read PDMA_PRISET register to know the channel priority.
[12]
FPRICLR12
PDMA Channel 12 Fixed Priority Clear Register (Write Only)
Set this bit to 1 to clear fixed priority level.
0 = No effect.
1 = Clear PDMA channel 12 fixed priority setting.
Note:
User can read PDMA_PRISET register to know the channel priority.
[11]
FPRICLR11
PDMA Channel 11 Fixed Priority Clear Register (Write Only)
Set this bit to 1 to clear fixed priority level.
0 = No effect.
1 = Clear PDMA channel 11 fixed priority setting.
