ISD94100 Series Technical Reference Manual
Sep 9, 2019
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[21]
BIQON
BIQ Enable Bit
0 = Biquad filter Disabled.
1 = Biquad filter Enabled.
[20]
FLTEN
Floating Point Format Enable Bit
0 = Input data is fixed point.
1 = Input data is single precision point.
[19:17]
FLTINTBIT
Floating Integer Bits Setting
000 = Integer is 0, Data range +/- 0.999.
001 = Integer is 1, Data range +/- 1.9999.
010 = Integer is 2, Data range +/- 3.9999.
Others = Reserved. Do not use.
[16:12]
TH
FIFO Threshold Level
If the valid data count of the FIFO data buffer is less than or equal to TH
(DPWM_CTL[16:12]) setting, the THIF (DPWM_STATUS[2]) will set to 1, else the THIF
(DPWM_STATUS[2]) will be cleared to 0.
[11]
THIE
FIFO Threshold Interrupt
0 = FIFO threshold interrupt Disabled
1 = FIFO threshold interrupt Enabled.
[10:8]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[7]
DRVEN
Driver Enable Bit
0 = Audio DPWM driver Disabled.
1 = Audio DPWM driver Enabled.
[6]
DPWMEN
Audio DPWM Modulator Enable
0 = Audio DPWM modulator Disabled.
1 = Audio DPWM modulator Enabled.
[5:4]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[3]
DEADTIME
Driver Dead Time Control.
Enabling this bit will insert an additional clock cycle deadtime into the switching of PMOS
and NMOS driver transistors.
[2]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[1:0]
FIFOWIDTH
FIFO Data Width
This bit field is used to define the bit-width of data word and valid bits in register
DPWM_FIFO.
00 = The bit-width of data word is 24-bit, valid bits is DPWM_FIFO[31:8].
01 = The bit-width of data word is 16-bit, valid bits is DPWM_FIFO[15:0].
10 = The bit-width of data word is 8-bit, valid bits is DPWM_FIFO[7:0].
11 = The bit-width of data word is 24-bit, valid bits is DPWM_FIFO[23:0].
Note:
When FLTEN is “0”, FIFOWIDTH is for fixed point setting.
