ISD94100 Series Technical Reference Manual
Sep 9, 2019
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UART Time-out Register (UART_TOUT)
Register
Offset
R/W Description
Reset Value
UART_TOUT
U0x20
R/W UART Time-out Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
DLY
7
6
5
4
3
2
1
0
TOIC
Bits
Description
[31:16]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[15:8]
DLY
TX Delay Time Value
This field is used to programming the transfer delay time between the last stop bit and next
start bit. The unit is bit time.
[7:0]
TOIC
Time-out Interrupt Comparator
The time-out counter resets and starts counting (the counting clock = baud rate) whenever
the RX FIFO receives a new data word if time out counter is enabled by setting TOCNTEN
(UART_INTEN[11]). Once the content of time-out counter is equal to that of time-out interrupt
comparator (TOIC (UART_TOUT[7:0])), a receiver time-out interrupt
(RXTOINT(UART_INTSTS[12])) is generated if RXTOIEN (UART_INTEN [4]) enabled. A
new incoming data word or RX FIFO empty will clear RXTOIF (UART_INTSTS[4]). In order
to avoid receiver time-out interrupt generation immediately during one character is being
received, TOIC value should be set between 40 and 255. So, for example, if TOIC is set with
40, the time-out interrupt is generated after four characters are not received when 1 stop bit
and no parity check is set for UART transfer.
