ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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00 = The Timer controller is operated in One-shot mode.
01 = The Timer controller is operated in Periodic mode.
10 = The Timer controller is operated in Toggle-output mode.
11 = The Timer controller is operated in Continuous Counting mode.
[26]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[25]
ACTSTS
Timer Active Status Bit (Read Only)
This bit indicates the 24-bit up counter status.
0 = 24-bit up counter is not active.
1 = 24-bit up counter is active.
Note:
This bit may active when CNT 0 transition to CNT 1.
[24]
EXTCNTEN
Event Counter Mode Enable Bit
This bit is for external counting pin function enabled.
0 = Event counter mode Disabled.
1 = Event counter mode Enabled.
Note:
When timer is used as an event counter, this bit should be set to 1 and select PCLK
as timer clock source.
[23]
WKEN
Wake-up Function Enable Bit
If this bit is set to 1, while timer interrupt flag TIF (TIMERx_INTSTS[0]) is 1 and INTEN
(TIMERx_CTL[29]) is enabled, the timer interrupt signal will generate a wake-up trigger
event to CPU.
0 = Wake-up function Disabled if timer interrupt signal generated.
1 = Wake-up function Enabled if timer interrupt signal generated.
[22]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[21]
TGLPINSEL
Toggle-output Pin Select
0 = Toggle mode output to TMx (Timer Event Counter Pin).
1 = Toggle mode output to TMx_EXT (Timer External Capture Pin).
[20]
PERIOSEL
Periodic Mode Behavior Selection Enable Bit
0 = The behavior selection in periodic mode is Disabled.
When user updates CMPDAT while timer is running in periodic mode,
CNT will be reset to default value.
1 = The behavior selection in periodic mode is Enabled.
When user update CMPDAT while timer is running in periodic mode, the limitations as
bellows list,
If updated CMPDAT value > CNT, CMPDAT will be updated and CNT keep running
continually.
If updated CMPDAT value = CNT, timer time-out interrupt will be asserted immediately.
If updated CMPDAT value < CNT, CNT will be reset to default value.
[19]
INTRGEN
Inter-timer Trigger Mode Enable Control
Setting this bit will enable the inter-timer trigger capture function.
The Timer0/2 will be in event counter mode and counting with external clock source or event.
Also, Timer1/3 will be in trigger-counting mode of capture function.
0 = Inter-Timer Trigger Capture mode Disabled.
1 = Inter-Timer Trigger Capture mode Enabled.
Note:
For Timer1/3, this bit is ignored and the read back value is always 0.
[18:8]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
