ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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Timer Data Register (TIMERx_CNT)
Register
Offset
R/W Description
Reset Value
TIMER0_CNT
T0x0C
R/W Timer0 Data Register
0x0000_0000
TIMER1_CNT
T0x10C R/W Timer1 Data Register
0x0000_0000
TIMER2_CNT
T0x0C
R/W Timer2 Data Register
0x0000_0000
TIMER3_CNT
T0x10C R/W Timer3 Data Register
0x0000_0000
31
30
29
28
27
26
25
24
RSTACT
Reserved
23
22
21
20
19
18
17
16
CNT
15
14
13
12
11
10
9
8
CNT
7
6
5
4
3
2
1
0
CNT
Bits
Description
[31]
RSTACT
Timer Data Register Reset Active (Read Only)
This bit indicates if the counter reset operation active.
When user writes this CNT register, timer starts to reset its internal 24-bit timer up-
counter to 0 and reload 8-bit pre-scale counter. At the same time, timer set this flag to
1 to indicate the counter reset operation is in progress. Once the counter reset
operation done, timer clear this bit to 0 automatically.
0 = Reset operation is done.
1 = Reset operation triggered by writing TIMERx_CNT is in progress.
Note:
This bit is read only.
[30:24]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write
with reset value.
[23:0]
CNT
Timer Data Register
Read operation.
Read this register to get CNT value. For example:
If EXTCNTEN (TIMERx_CTL[24] ) is 0, user can read CNT value for getting current
24-bit counter value.
If EXTCNTEN (TIMERx_CTL[24] ) is 1, user can read CNT value for getting current
24-bit event input counter value.
Write operation.
Writing any value to this register will reset current CNT value to 0 and reload internal
8-bit prescale counter.
