ISD94100 Series Technical Reference Manual
Sep 9, 2019
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Rev1.09
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I2C Bus Management Status Register (I2C_BUSSTS)
Register
Offset
R/W Description
Reset Value
I2C_BUSSTS
0x58
R/W I
2
C Bus Management Status Register
0x0000_0000
31
30
29
28
27
26
25
24
Reserved
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
Reserved
7
6
5
4
3
2
1
0
PECDONE
CLKTO
BUSTO
SCTLDIN
ALERT
PECERR
BCDONE
BUSY
Bits
Description
[31:8]
Reserved
Reserved. Any values read should be ignored. When writing to this field always write with
reset value.
[7]
PECDONE
PEC Byte Transmission/Receive Done
0 = Indicates the PEC transmission/ receive is not finished when the PECEN is set.
1 = Indicates the PEC transmission/ receive is finished when the PECEN is set.
Note:
Software can write 1 to clear this bit.
[6]
CLKTO
Clock Low Cumulate Time-out Status
0 = Indicates that the cumulative clock low is no any time-out.
1 = Indicates that the cumulative clock low time-out occurred.
Note:
Software can write 1 to clear this bit.
[5]
BUSTO
Bus Time-out Status
0 = Indicates that there is no any time-out or external clock time-out.
1 = Indicates that a time-out or external clock time-out occurred.
In bus busy, the bit indicates the total clock low time-out event occurred otherwise, it
indicates the bus idle time-out event occurred.
Note:
Software can write 1 to clear this bit.
[4]
SCTLDIN
Bus Suspend or Control Signal Input Status
0 = The input status of I2Cn_SMBSUS pin is 0.
1 = The input status of I2Cn_SMBSUS pin is 1.
[3]
ALERT
SMBus Alert Status
Device Mode (BMHEN =0).
0 = Indicates I2Cn_SMBAL pin state is low.
1 = Indicates I2Cn_SMBAL pin state is high.
Host Mode (BMHEN =1).
0 = No SMBALERT event.
1 = Indicates there is SMBALERT event (falling edge) is detected in I2Cn_SMBAL pin when
the BMHEN = 1 (SMBus host configuration) and the ALERTEN = 1.
